.\"   $Id: ocp.1,v 1.7 2006/03/30 19:07:45 xtof Exp $
.\" @(#)Labo.l 0.0 92/09/24 UPMC; Author: Christophe ALEXANDRE
.pl -.4
.TH OCP 1 "September 27, 2001" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
.SH NAME
.TP
ocp
 - Standard Cell Placer
.so man1/alc_origin.1
.SH SYNOPSIS
.TP
\fBocp\fP 
[\fBoptions\fP] \fInetlist\fP \fIoutputname\fP
.br

.SH DESCRIPTION
\fBocp\fP is an automatic place tool for standard-cells.
.br

\fBinput net-list\fP
.br
The \fInetlist\fP file describes the input net-list.
.br
\fBocp\fP supports a hierarchical net-list. In this case the net-list is flattened by the placer according to the catalog file. The net-list format can be : structural VHDL, EDIF, or ALLIANCE internal format according to the environment variable \fBMBK_IN_LO\fP.
.br

\fBoutput layout\fP
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The file containing the placed block will have the name \fIoutputname\fP. This name is not optionnal and must always be present. The output format is defined by the environment variable \fBMBK_OUT_PH\fP.
.br

.SH OPTIONS
.br
\fBOptional cells placement file\fP
.br
\fB-partial <NAME>\fP
.br
A user defined pre-placement can be specified, thanks to a placement file.
.br
The optional placement file must be given by the user. It must have an extension that denotes the format defined by the environment variable \fBMBK_IN_PH\fP.
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\fBOptional connectors placement\fP
.br
The placement of connectors can be also specified.
.br
There are four ways to place connectors in a physical view :
.br
.br
\fB-partial <NAME>\fP pre-placed connectors defined by the user can be provided through the pre-placement file. In that case, automatic connector placement is impossible.
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\fB-c\fP option will automatically place the connectors randomly. The auto placement will set connectors on each side of the abutment box.
.br
\fB-ring\fP option will automatically place the connectors for the  ring pad placement tool. The placement is random but only on the north and south side unless the \fB-ioc <NAME>\fP option is given, in which case the constraints given in the <NAME>.ioc file will be respected, but with layers suitable for ring. 
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\fB-ioc <NAME>\fP option will place connectors as specified by the <NAME>.ioc given file.
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\fBMargin\fP
.br
It is possible to force the free area of the physical view.
.br
The \fB-margin <MARGIN>\fP option allow to set The amount of free area added in percentage of the cells area.
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The resulting area will be equal to CELL_AREA * (1 + <MARGIN>).
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By default, the margin value is 0.2 (20%)
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\fB-eqmargin\fP option will distribute equitably the margin between cells. By default, the biggest possible number of 2-pitch tie cells is inserted. This is done to have the best well and bulk polarity.
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\fBNumber of rows\fP
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\fB-rows <NR>\fP option forces the design to be placed in <NR> rows.
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The abutment box's width is automatically generated.
.br
This option won't be used if a defined placement file is given.
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\fBVerbose mode\fP
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\fB-v\fP set the verbose mode on
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\fBGnuplot\fP
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\fB-gnuplot\fP option allow to generate automatically gnuplot files, for editing statistics
.br
.SH IOC format
.PP
The IOC format is based on \fBCadence\fB input-output connectors placement description.
.br
The description is composed of 5 possibles sections: TOP(), BOTTOM(), LEFT(), RIGHT(), and IGNORE()
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In each section except IGNORE(), there are placed IOs.
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In the IGNORE() section, the IOs are ignored by \fBOCP\fB.
.br
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In every section, the IO syntax could be:
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for pin:       (IOPIN iopinName.0 );
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for space:     SPACE  value;                             
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The capital words are keywords. orientation is not required.
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The value is the space (number of pitches) between the IO above and the IO below it. 
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\fBExample\fB
.br
.nf
TOP ( # IOs are ordered from left to right
   (IOPIN b(3).0 );
   (IOPIN cin.0 );
   (IOPIN ck.0 );
   (IOPIN cout.0 );
)
BOTTOM ( # IOs are ordered from left to right
   (IOPIN i(3).0 );
   (IOPIN i(4).0 );
   (IOPIN i(5).0 );
   (IOPIN i(6).0 );
)

IGNORE ( # IOs are ignored(not placed) by IO Placer
)
.fi
.SH ENVIRONMENT VARIABLES
.PP
\fBocp\fP uses the environment variables MBK_VDD and MBK_VSS to know
the name of the power signals vdd and vss.
.br

.SH SEE ALSO
.PP
nero(1), MBK_IN_LO(1), MBK_IN_PH(1), MBK_OUT_PH(1), MBK_VDD(1), MBK_VSS(1)
.so man1/alc_bug_report.1
